In many electronic devices, it is necessary to generate a voltage having a magnitude that is greater than the magnitude of a supply voltage providing power to the device. In other applications, it is necessary to generate a voltage having a polarity that is different from the polarity of a supply voltage providing power to the device. Charge pumps are often used for both of these purposes. Although a wide variety of charge pumps have been developed, most charge pumps use capacitors to obtain a boosted voltage or a voltage having a different polarity. To generate a boosted voltage, the supply voltage VCC is typically applied to a first terminal of the capacitor while the second terminal of the capacitor is held at ground during a first phase of a cycle. After the capacitor has been charged to VCC, the first terminal of the capacitor is coupled to a load that is to receive the boosted voltage, and the supply voltage VCC is applied to the second terminal of the capacitor during a second phase of the cycle. In so far as the capacitor was charged to VCC during the first phase when the second terminal was connected to ground, the voltage on the first terminal is approximately twice VCC during the second phase when the second terminal is connected to VCC. The charge pump repetitively alternates between the first and second phases, each cycle generating an output voltage that is approximately twice the supply voltage VCC. By using multiple boost stages, output voltages that are a larger multiple of the supply voltage VCC can be generated.
To generate a voltage having a polarity that is different from the polarity of the supply voltage VCC, the capacitor is typically charged in the same manner as described above, but the terminals connected in a different manner during the second phase of each cycle. Specifically, during the first phase, the supply voltage VCC is again applied to the first terminal of the capacitor while the second terminal of the capacitor is held at ground. After the capacitor has been charged to VCC, the first terminal of the capacitor is coupled to ground, and the second terminal of the capacitor is connected to the load that is to receive the opposite polarity voltage during the second phase. In so far as the capacitor was charged to VCC during the first phase when the second terminal was connected to ground, the voltage on the second terminal is approximately −VCC during the second phase when the first terminal is connected to ground.
Charge pumps are presently used in a wide variety of applications. For example, charge pumps are typically used in memory devices to provide a negative substrate voltage or to provide a boosted voltage that can be applied to the gate of an NMOS transistor to allow the transistor to couple the supply voltage to an output node. Charge pumps are also used in CMOS imagers to generate voltage of different polarities and magnitudes during various operations carried out by the imagers. For example, charge pumps are commonly used to supply power having a polarity that is different from that of the supply voltage to the imaging array of CMOS imagers.
A typical charge pump 10 that can be used to supply a negative voltage when powered by a positive supply voltage is shown in FIG. 1. The charge pump 10 includes a source 14 of a reference voltage VR, which is applied to a voltage boost circuit 16 formed by a capacitor 20 having a capacitance CC, two switches 24, 26 that are closed during the first phase of each cycle, and two switches 30, 32 that are closed during the second phase of each cycle. A load L is connected to an output node 34 of the charge pump 10. The switches 24, 26 that are closed during the first phase of each cycle are open during the second phase, and the switches 30, 32 that are closed during the second phase are open during the first phase. The load L is assumed to be the array of a CMOS imager, which is highly capacitive, with a capacitance of CL. The voltage across the capacitive load CL is designated VL.
In operation, the reference voltage source 14 is connected to the capacitor 20 by the switch 26 during the first phase of each cycle, while the switch 24 connects the other terminal of the capacitor 20 to ground. The capacitor 20 is therefore charged to −VR during the first phase. During the second phase of each cycle, the switch 32 is closed to connect the lower terminal of the capacitor 20 to ground, and the other switch 30 is closed to connect the other terminal of the capacitor 20 to the load L. Insofar as the capacitor 20 was charged to −VR, the capacitive load CL is eventually charged to −VR after a sufficient number of cycles.
The time required for a charge pump, including the charge pump 10 shown in FIG. 1, to output a target voltage is sometimes referred to as the time constant of the charge pump. In general the time constant of a charge pump driving a resistive load is very short as long as the current demands of the load do not exceed the current that can be supplied by the charge pump. However, the time constant of a charge pump driving a capacitive load can be very long because the voltage applied to the load incrementally increases through a charge sharing process each cycle. The time constant of the charge pump 10 is affected by the magnitude of the capacitance CC relative to the load capacitance CL, as well as the difference between the reference voltage VR and the voltage VL to which the capacitive load CL has already been charged. Specifically, the change ΔV in the load voltage VL when driven by the charge pump 10 is given by the formula:ΔV=[CC/(CC+CL)]*[VR−VL].  Equation 1It is thus seen that the incremental increase ΔV in the load voltage VL each cycle is proportional to two factors. The first factor is the difference between the reference voltage VR supplied by the charge pump 10 and the load voltage VL at the start of the cycle. The second factor is the ratio of the charge pump capacitance CC to the sum of the charge pump capacitance CC and the load capacitance CL. If the load capacitance CL is very much greater than the charge pump capacitance CC, Equation 1 can be effectively simplified to:ΔV=[CC/CL]*[VR−VL].  Equation 2.In such case, the incremental increase ΔV in the load voltage VL is proportional to the ratio of the charge pump capacitance CC to the load capacitance CL as well as to the difference between the reference voltage VR and the load voltage VL.
It can be seen from Equation 2 that incremental increase ΔV of the load voltage VL will be very small if the load capacitance CL is significantly greater than the charge pump capacitance CC. It can also be seen from Equation 2 that the increase ΔV of the load voltage VL will become smaller as the load voltage VL approaches the reference voltage VR . Both of these factors can result in very large time constants for charge pumps driving a large capacitive load. This problem is particularly severe for charge pumps supplying power to CMOS imagers having a polarity that is different from that of the supply voltage because, as mentioned above, the imaging array receiving such voltage has a very large capacitance. As a result, the time constant of charge pumps supplying power to the arrays of CMOS imagers can be undesirably long.
There is therefore a need for a charge pump having a shorter time constant, particularly when the charge pump is driving a highly capacitive load.